src/soc/simple/test/teststate.py

   1 class SimState:
   2     def __init__(self, sim):
   3         self.sim = sim
   4
   5     def get_intregs(self):
   6         self.intregs = []
   7         for i in range(32):
   8             simregval = self.sim.gpr[i].asint()
   9             self.intregs.append(simregval)
  10
  11 # HDL class here with same functions