src/soc/simple/test/teststate.py

   1 from openpower.decoder.power_enums import XER_bits
   2 import copy
   3
   4
   5 class SimState:
   6     def __init__(self, sim):
   7         self.sim = sim
   8
   9     def get_intregs(self):
  10         self.intregs = []
  11         for i in range(32):
  12             simregval = self.sim.gpr[i].asint()
  13             self.intregs.append(simregval)
  14
  15     def get_crregs(self):
  16         self.crregs = []
  17         for i in range(8):
  18             cri = self.sim.crl[7 - i].get_range().value
  19             self.crregs.append(cri)
  20
  21     def get_xregs(self):
  22         self.so = self.sim.spr['XER'][XER_bits['SO']].value
  23         self.ov = self.sim.spr['XER'][XER_bits['OV']].value
  24         self.ov32 = self.sim.spr['XER'][XER_bits['OV32']].value
  25         self.ca = self.sim.spr['XER'][XER_bits['CA']].value
  26         self.ca32 = self.sim.spr['XER'][XER_bits['CA32']].value
  27         self.ov = self.ov | (self.ov32 << 1)
  28         self.ca = self.ca | (self.ca32 << 1)
  29
  30     def get_pc(self):
  31         self.pc = self.sim.pc.CIA.value
  32
  33 # class HDLState: