propagate new use_svp64_ldst_dec mode through TestCore and TestIssuer
[soc.git] / src / unused / TLB / test / test_address_encoder.py
1 from nmigen.compat.sim import run_simulation
2 from soc.TLB.AddressEncoder import AddressEncoder
3 from soc.TestUtil.test_helper import assert_eq, assert_ne, assert_op
4
5
6 # This function allows for the easy setting of values to the AddressEncoder
7 # Arguments:
8 # dut: The AddressEncoder being tested
9 # i (Input): The array of single bits to be written
10 def set_encoder(dut, i):
11 yield dut.i.eq(i)
12 yield
13
14 # Checks the single match of the AddressEncoder
15 # Arguments:
16 # dut: The AddressEncoder being tested
17 # sm (Single Match): The expected match result
18 # op (Operation): (0 => ==), (1 => !=)
19
20
21 def check_single_match(dut, sm, op):
22 out_sm = yield dut.single_match
23 assert_op("Single Match", out_sm, sm, op)
24
25 # Checks the multiple match of the AddressEncoder
26 # Arguments:
27 # dut: The AddressEncoder being tested
28 # mm (Multiple Match): The expected match result
29 # op (Operation): (0 => ==), (1 => !=)
30
31
32 def check_multiple_match(dut, mm, op):
33 out_mm = yield dut.multiple_match
34 assert_op("Multiple Match", out_mm, mm, op)
35
36 # Checks the output of the AddressEncoder
37 # Arguments:
38 # dut: The AddressEncoder being tested
39 # o (Output): The expected output
40 # op (Operation): (0 => ==), (1 => !=)
41
42
43 def check_output(dut, o, op):
44 out_o = yield dut.o
45 assert_op("Output", out_o, o, op)
46
47 # Checks the state of the AddressEncoder
48 # Arguments:
49 # dut: The AddressEncoder being tested
50 # sm (Single Match): The expected match result
51 # mm (Multiple Match): The expected match result
52 # o (Output): The expected output
53 # ss_op (Operation): Operation for the match assertion (0 => ==), (1 => !=)
54 # mm_op (Operation): Operation for the match assertion (0 => ==), (1 => !=)
55 # o_op (Operation): Operation for the match assertion (0 => ==), (1 => !=)
56
57
58 def check_all(dut, sm, mm, o, sm_op, mm_op, o_op):
59 yield from check_single_match(dut, sm, sm_op)
60 yield from check_multiple_match(dut, mm, mm_op)
61 yield from check_output(dut, o, o_op)
62
63
64 def tbench(dut):
65 # Check invalid input
66 in_val = 0b000
67 single_match = 0
68 multiple_match = 0
69 output = 0
70 yield from set_encoder(dut, in_val)
71 yield from check_all(dut, single_match, multiple_match, output, 0, 0, 0)
72
73 # Check single bit
74 in_val = 0b001
75 single_match = 1
76 multiple_match = 0
77 output = 0
78 yield from set_encoder(dut, in_val)
79 yield from check_all(dut, single_match, multiple_match, output, 0, 0, 0)
80
81 # Check another single bit
82 in_val = 0b100
83 single_match = 1
84 multiple_match = 0
85 output = 2
86 yield from set_encoder(dut, in_val)
87 yield from check_all(dut, single_match, multiple_match, output, 0, 0, 0)
88
89 # Check multiple match
90 # We expected the lowest bit to be returned which is address 0
91 in_val = 0b101
92 single_match = 0
93 multiple_match = 1
94 output = 0
95 yield from set_encoder(dut, in_val)
96 yield from check_all(dut, single_match, multiple_match, output, 0, 0, 0)
97
98 # Check another multiple match
99 # We expected the lowest bit to be returned which is address 1
100 in_val = 0b110
101 single_match = 0
102 multiple_match = 1
103 output = 1
104 yield from set_encoder(dut, in_val)
105 yield from check_all(dut, single_match, multiple_match, output, 0, 0, 0)
106
107
108 def test_addr():
109 dut = AddressEncoder(4)
110 run_simulation(dut, tbench(dut),
111 vcd_name="Waveforms/test_address_encoder.vcd")
112 print("AddressEncoder Unit Test Success")
113
114
115 if __name__ == "__main__":
116 test_addr()