src/unused/TLB/test/test_permission_validator.py

   1 from nmigen.compat.sim import run_simulation
   2
   3 from soc.TLB.PermissionValidator import PermissionValidator
   4
   5 from soc.TestUtil.test_helper import assert_op
   6
   7
   8 def set_validator(dut, d, xwr, sm, sa, asid):
   9     yield dut.data.eq(d)
  10     yield dut.xwr.eq(xwr)
  11     yield dut.super_mode.eq(sm)
  12     yield dut.super_access.eq(sa)
  13     yield dut.asid.eq(asid)
  14     yield
  15
  16
  17 def check_valid(dut, v, op):
  18     out_v = yield dut.valid
  19     assert_op("Valid", out_v, v, op)
  20
  21
  22 def tbench(dut):
  23     # 80 bits represented. Ignore the MSB as it will be truncated
  24     # ASID is bits first 4 hex values (bits 64 - 78)
  25
  26     # Test user mode entry valid
  27     # Global Bit matching ASID
  28     # Ensure that user mode and valid is enabled!
  29     data = 0x7FFF0000000000000031
  30     # Ignore MSB it will be truncated
  31     asid = 0x7FFF
  32     super_mode = 0
  33     super_access = 0
  34     xwr = 0
  35     valid = 1
  36     yield from set_validator(dut, data, xwr, super_mode, super_access, asid)
  37     yield from check_valid(dut, valid, 0)
  38
  39     # Test user mode entry valid
  40     # Global Bit nonmatching ASID
  41     # Ensure that user mode and valid is enabled!
  42     data = 0x7FFF0000000000000031
  43     # Ignore MSB it will be truncated
  44     asid = 0x7FF6
  45     super_mode = 0
  46     super_access = 0
  47     xwr = 0
  48     valid = 1
  49     yield from set_validator(dut, data, xwr, super_mode, super_access, asid)
  50     yield from check_valid(dut, valid, 0)
  51
  52     # Test user mode entry invalid
  53     # Global Bit nonmatching ASID
  54     # Ensure that user mode and valid is enabled!
  55     data = 0x7FFF0000000000000021
  56     # Ignore MSB it will be truncated
  57     asid = 0x7FF6
  58     super_mode = 0
  59     super_access = 0
  60     xwr = 0
  61     valid = 0
  62     yield from set_validator(dut, data, xwr, super_mode, super_access, asid)
  63     yield from check_valid(dut, valid, 0)
  64
  65     # Test user mode entry valid
  66     # Ensure that user mode and valid is enabled!
  67     data = 0x7FFF0000000000000011
  68     # Ignore MSB it will be truncated
  69     asid = 0x7FFF
  70     super_mode = 0
  71     super_access = 0
  72     xwr = 0
  73     valid = 1
  74     yield from set_validator(dut, data, xwr, super_mode, super_access, asid)
  75     yield from check_valid(dut, valid, 0)
  76
  77     # Test user mode entry invalid
  78     # Ensure that user mode and valid is enabled!
  79     data = 0x7FFF0000000000000011
  80     # Ignore MSB it will be truncated
  81     asid = 0x7FF6
  82     super_mode = 0
  83     super_access = 0
  84     xwr = 0
  85     valid = 0
  86     yield from set_validator(dut, data, xwr, super_mode, super_access, asid)
  87     yield from check_valid(dut, valid, 0)
  88
  89     # Test supervisor mode entry valid
  90     # The entry is NOT in user mode
  91     # Ensure that user mode and valid is enabled!
  92     data = 0x7FFF0000000000000001
  93     # Ignore MSB it will be truncated
  94     asid = 0x7FFF
  95     super_mode = 1
  96     super_access = 0
  97     xwr = 0
  98     valid = 1
  99     yield from set_validator(dut, data, xwr, super_mode, super_access, asid)
 100     yield from check_valid(dut, valid, 0)
 101
 102     # Test supervisor mode entry invalid
 103     # The entry is in user mode
 104     # Ensure that user mode and valid is enabled!
 105     data = 0x7FFF0000000000000011
 106     # Ignore MSB it will be truncated
 107     asid = 0x7FFF
 108     super_mode = 1
 109     super_access = 0
 110     xwr = 0
 111     valid = 0
 112     yield from set_validator(dut, data, xwr, super_mode, super_access, asid)
 113     yield from check_valid(dut, valid, 0)
 114
 115     # Test supervisor mode entry valid
 116     # The entry is NOT in user mode with access
 117     # Ensure that user mode and valid is enabled!
 118     data = 0x7FFF0000000000000001
 119     # Ignore MSB it will be truncated
 120     asid = 0x7FFF
 121     super_mode = 1
 122     super_access = 1
 123     xwr = 0
 124     valid = 1
 125     yield from set_validator(dut, data, xwr, super_mode, super_access, asid)
 126     yield from check_valid(dut, valid, 0)
 127
 128     # Test supervisor mode entry valid
 129     # The entry is in user mode with access
 130     # Ensure that user mode and valid is enabled!
 131     data = 0x7FFF0000000000000011
 132     # Ignore MSB it will be truncated
 133     asid = 0x7FFF
 134     super_mode = 1
 135     super_access = 1
 136     xwr = 0
 137     valid = 1
 138     yield from set_validator(dut, data, xwr, super_mode, super_access, asid)
 139     yield from check_valid(dut, valid, 0)
 140
 141
 142 def test_permv():
 143     dut = PermissionValidator(15, 64)
 144     run_simulation(dut, tbench(
 145         dut), vcd_name="Waveforms/test_permission_validator.vcd")
 146     print("PermissionValidator Unit Test Success")
 147
 148
 149 if __name__ == "__main__":
 150     test_permv()