"""regspec_decode functions for the relationship between regspecs and Decode2Execute1Type these functions encodes the understanding (relationship) between Regfiles, Computation Units, and the Power ISA Decoder (PowerDecoder2). based on the regspec, which contains the register file name and register name, return a tuple of: * how the decoder should determine whether the Function Unit needs access to a given Regport or not * which Regfile number on that port should be read to get that data * when it comes to writing: likewise, which Regfile num should be written Note that some of the port numbering encoding is *unary*. in the case of "Full Condition Register", it's a full 8-bit mask of read/write-enables. This actually matches directly with the XFX field in MTCR, and at some point that 8-bit mask from the instruction could actually be passed directly through to full_cr (TODO). For the INT and CR numbering, these are expressed in binary in the instruction and need to be converted to unary (1<