add SVP64 CR EXTRA field-extension, from 3-bit to 7-bit (plus isvec)

[soc.git] / README.md

diff --git a/README.md b/README.md
index beb32519ccd423cc34d34eb368f95348aac00175..c7c6c9963287d1af76ffe68103f2b3dae250b7ad 100644 (file)
--- a/README.md
+++ b/README.md
@@ -1,6 +1,16 @@
+# About
+The main SOC portion of Libre-SOC. A quad-core open source SOC with a GPU, VPU, and
+open source VLSI design cells.
+
+Open source down to VLSI Cells.
+
+# [Documentation](https://libre-soc.org/Documentation/index/)
+
 # Installation
 
-python3 setup.py develop
+    make update
+    make install
+    make test # optional (ish)
 
 # Running Simulator tests
 
@@ -10,6 +20,7 @@ source.  Obtain the latest tarball, unpack it, then:
 
     cd gdb-9.1 (or other location)
     mkdir build
+    cd build
      ../configure --srcdir=.. --host=x86_64-linux --target=powerpc64-linux-gnu
     make -j16
     make install