adjust SVP64RM class to output more PowerDecoder-friendly csv augmentation

[soc.git] / setup.py

diff --git a/setup.py b/setup.py
index 5664b046803d82c7c0b626d260a1dcbb4927566a..3a58066a8bb70077b035500e46d82b98acfbbbb9 100644 (file)
--- a/setup.py
+++ b/setup.py
@@ -13,13 +13,15 @@ install_requires = [
     #    'sfpy',
     'ieee754fpu',  # needs to be installed manually from git.libre-soc.org
     'pygdbmi',
-    'nmigen-soc', # install manually from git.libre-soc.org
+    'nmigen-soc',  # install manually from git.libre-soc.org
     'ply',  # needs to be installed manually
-    'astor',
+    'astor'
 ]
 
 test_requires = [
     'nose',
+    # install from https://salsa.debian.org/Kazan-team/power-instruction-analyzer
+    'power-instruction-analyzer'
 ]
 
 setup(