self.pll_48_o = Signal() # 6-divide (test signal) from PLL
self.clk_sel_i = Signal(3) # clock source selection
self.core_clk_o = Signal() # main core clock (selectable)
self.pll_48_o = Signal() # 6-divide (test signal) from PLL
self.clk_sel_i = Signal(3) # clock source selection
self.core_clk_o = Signal() # main core clock (selectable)