radix: reading first page table entry

[soc.git] / src / soc / decoder / decode2execute1.py

diff --git a/src/soc/decoder/decode2execute1.py b/src/soc/decoder/decode2execute1.py
index 9442af684b4bb8630021b5b48fd3f0f543c000a1..a6ac6262367c445d55ad7df6f64c72d0efb575d9 100644 (file)
--- a/src/soc/decoder/decode2execute1.py
+++ b/src/soc/decoder/decode2execute1.py
@@ -83,20 +83,20 @@ class Decode2ToOperand(IssuerDecode2ToOperand):
 
 class Decode2ToExecute1Type(RecordObject):
 
-    def __init__(self, name=None, asmcode=True, opkls=None):
+    def __init__(self, name=None, asmcode=True, opkls=None, do=None):
 
-        if opkls is None:
+        if do is None and opkls is None:
             opkls = Decode2ToOperand
 
         RecordObject.__init__(self, name=name)
 
         if asmcode:
             self.asmcode = Signal(8, reset_less=True) # only for simulator
-        self.write_reg = Data(5, name="rego")
-        self.write_ea = Data(5, name="ea") # for LD/ST in update mode
-        self.read_reg1 = Data(5, name="reg1")
-        self.read_reg2 = Data(5, name="reg2")
-        self.read_reg3 = Data(5, name="reg3")
+        self.write_reg = Data(7, name="rego")
+        self.write_ea = Data(7, name="ea") # for LD/ST in update mode
+        self.read_reg1 = Data(7, name="reg1")
+        self.read_reg2 = Data(7, name="reg2")
+        self.read_reg3 = Data(7, name="reg3")
         self.write_spr = Data(SPR, name="spro")
         self.read_spr1 = Data(SPR, name="spr1")
         #self.read_spr2 = Data(SPR, name="spr2") # only one needed
@@ -109,12 +109,15 @@ class Decode2ToExecute1Type(RecordObject):
         self.write_fast1 = Data(3, name="fasto1")
         self.write_fast2 = Data(3, name="fasto2")
 
-        self.read_cr1 = Data(3, name="cr_in1")
-        self.read_cr2 = Data(3, name="cr_in2")
-        self.read_cr3 = Data(3, name="cr_in2")
-        self.write_cr = Data(3, name="cr_out")
+        self.read_cr1 = Data(7, name="cr_in1")
+        self.read_cr2 = Data(7, name="cr_in2")
+        self.read_cr3 = Data(7, name="cr_in2")
+        self.write_cr = Data(7, name="cr_out")
 
         # decode operand data
-        print ("decode2execute init", name, opkls)
+        print ("decode2execute init", name, opkls, do)
         #assert name is not None, str(opkls)
-        self.do = opkls(name)
+        if do is not None:
+            self.do = do
+        else:
+            self.do = opkls(name)