resolve spr names in ISACaller

[soc.git] / src / soc / decoder / isa / caller.py

diff --git a/src/soc/decoder/isa/caller.py b/src/soc/decoder/isa/caller.py
index a7ec70d15ad49a7083f52e1fe07cb86df72132fb..a57194bec41ab28490d0df91d75362b7f62d88f8 100644 (file)
--- a/src/soc/decoder/isa/caller.py
+++ b/src/soc/decoder/isa/caller.py
@@ -9,7 +9,8 @@ from functools import wraps
 from soc.decoder.orderedset import OrderedSet
 from soc.decoder.selectable_int import (FieldSelectableInt, SelectableInt,
                                         selectconcat)
-from soc.decoder.power_enums import spr_dict, XER_bits, insns, InternalOp
+from soc.decoder.power_enums import (spr_dict, spr_byname, XER_bits,
+                                     insns, InternalOp)
 from soc.decoder.helpers import exts, trunc_div, trunc_rem
 from collections import namedtuple
 import math
@@ -186,24 +187,44 @@ class SPR(dict):
     def __init__(self, dec2, initial_sprs={}):
         self.sd = dec2
         dict.__init__(self)
-        self.update(initial_sprs)
+        for key, v in initial_sprs.items():
+            if isinstance(key, SelectableInt):
+                key = key.value
+            key = special_sprs.get(key, key)
+            if isinstance(key, int):
+                info = spr_dict[key]
+            else:
+                info = spr_byname[key]
+            if not isinstance(v, SelectableInt):
+                v = SelectableInt(v, info.length)
+            self[key] = v
 
     def __getitem__(self, key):
+        print ("get spr", key)
+        print ("dict", self.items())
         # if key in special_sprs get the special spr, otherwise return key
         if isinstance(key, SelectableInt):
             key = key.value
+        if isinstance(key, int):
+            key = spr_dict[key].SPR
         key = special_sprs.get(key, key)
         if key in self:
-            return dict.__getitem__(self, key)
+            res = dict.__getitem__(self, key)
         else:
             info = spr_dict[key]
             dict.__setitem__(self, key, SelectableInt(0, info.length))
-            return dict.__getitem__(self, key)
+            res = dict.__getitem__(self, key)
+        print ("spr returning", key, res)
+        return res
 
     def __setitem__(self, key, value):
         if isinstance(key, SelectableInt):
             key = key.value
+        if isinstance(key, int):
+            key = spr_dict[key].SPR
+            print ("spr key", key)
         key = special_sprs.get(key, key)
+        print ("setting spr", key, value)
         dict.__setitem__(self, key, value)
 
     def __call__(self, ridx):
@@ -271,7 +292,9 @@ class ISACaller:
         # "undefined", just set to variable-bit-width int (use exts "max")
         self.undefined = SelectableInt(0, 256) # TODO, not hard-code 256!
 
-        self.namespace = {'GPR': self.gpr,
+        self.namespace = {}
+        self.namespace.update(self.spr)
+        self.namespace.update({'GPR': self.gpr,
                           'MEM': self.mem,
                           'SPR': self.spr,
                           'memassign': self.memassign,
@@ -282,7 +305,8 @@ class ISACaller:
                           'undefined': self.undefined,
                           'mode_is_64bit': True,
                           'SO': XER_bits['SO']
-                          }
+                          })
+
 
         # field-selectable versions of Condition Register TODO check bitranges?
         self.crl = []
@@ -572,6 +596,8 @@ class ISACaller:
                         self.spr[name] = output
                     else:
                         self.namespace[name].eq(output)
+                    if name == 'MSR':
+                        print ('msr written', hex(self.msr.value))
                 else:
                     regnum = yield getattr(self.decoder, name)
                     print('writing reg %d %s' % (regnum, str(output)))