def __init__(self, num):
self.num = num
-def run_tst(generator, initial_regs, initial_sprs={}):
+def run_tst(generator, initial_regs, initial_sprs=None, svstate=0):
+ if initial_sprs is None:
+ initial_sprs = {}
m = Module()
comb = m.d.comb
instruction = Signal(32)
m.submodules.pdecode2 = pdecode2 = PowerDecode2(pdecode)
simulator = ISA(pdecode2, initial_regs, initial_sprs, 0,
initial_insns=gen, respect_pc=True,
+ initial_svstate=svstate,
disassembly=insncode,
bigendian=0)
comb += pdecode2.dec.raw_opcode_in.eq(instruction)
def process():
+ yield pdecode2.dec.bigendian.eq(0) # little / big?
pc = simulator.pc.CIA.value
index = pc//4
while index < len(instructions):
yield Settle()
ins, code = instructions[index]
- print("0x{:X}".format(ins & 0xffffffff))
- print(code)
+ print(" 0x{:X}".format(ins & 0xffffffff))
+ opname = code.split(' ')[0]
+ print(code, opname)
# ask the decoder to decode this binary data (endian'd)
- yield pdecode2.dec.bigendian.eq(0) # little / big?
- yield instruction.eq(ins) # raw binary instr.
- yield Delay(1e-6)
- opname = code.split(' ')[0]
- yield from simulator.call(opname)
+ yield from simulator.execute_one()
pc = simulator.pc.CIA.value
index = pc//4