fix Bug 603 - use SPR names/numbers from sprs.csv

[soc.git] / src / soc / decoder / power_decoder2.py

diff --git a/src/soc/decoder/power_decoder2.py b/src/soc/decoder/power_decoder2.py
index 0662284351b588a659ebd96a663dc72df94cc34f..7550afbd243005f5fa4beb147e174360cb2d7c54 100644 (file)
--- a/src/soc/decoder/power_decoder2.py
+++ b/src/soc/decoder/power_decoder2.py
@@ -934,18 +934,12 @@ class PowerDecodeSubset(Elaboratable):
         spr = Signal(10, reset_less=True)
         comb += spr.eq(decode_spr_num(self.dec.SPR)) # from XFX
 
-        # XXX BUG - don't use hardcoded magic constants.
-        # also use ".value" otherwise the test fails.  bit of a pain
-        # https://bugs.libre-soc.org/show_bug.cgi?id=603
-
-        SPR_PID   = 48  # TODO read docs for POWER9
         # Microwatt doesn't implement the partition table
-        # instead has PRTBL register (SPR) to point to process table
-        SPR_PRTBL = 720 # see common.vhdl in microwatt, not in POWER9
+        # instead has PRTBL(SVSRR0) register (SPR) to point to process table
         with m.If(((self.dec.op.internal_op == MicrOp.OP_MTSPR) |
                    (self.dec.op.internal_op == MicrOp.OP_MFSPR)) &
-                  ((spr == SPR.DSISR) | (spr == SPR.DAR)
-                   | (spr==SPR_PRTBL) | (spr==SPR_PID))):
+                   ((spr == SPR.DSISR.value) | (spr == SPR.DAR.value) |
+                     (spr==SPR.SVSRR0.value) | (spr==SPR.PIDR.value))):
             comb += self.do_copy("fn_unit", Function.MMU)
         with m.Else():
             comb += self.do_copy("fn_unit",fn)