[Bug 580] redirect MMU SPRs to the MMU

[soc.git] / src / soc / decoder / power_decoder2.py

diff --git a/src/soc/decoder/power_decoder2.py b/src/soc/decoder/power_decoder2.py
index beab7bef52201939914aecbd69cce91b0015808e..1633d1912aa468bf44b8f4ed1568cbc28a1ddd82 100644 (file)
--- a/src/soc/decoder/power_decoder2.py
+++ b/src/soc/decoder/power_decoder2.py
@@ -23,7 +23,8 @@ from soc.decoder.power_enums import (MicrOp, CryIn, Function,
                                      CRInSel, CROutSel,
                                      LdstLen, In1Sel, In2Sel, In3Sel,
                                      OutSel, SPR, RC, LDSTMode)
-from soc.decoder.decode2execute1 import Decode2ToExecute1Type, Data
+from soc.decoder.decode2execute1 import (Decode2ToExecute1Type, Data,
+                                         Decode2ToOperand)
 from soc.consts import MSR
 
 from soc.regfile.regfiles import FastRegs
@@ -628,8 +629,14 @@ class PowerDecodeSubset(Elaboratable):
         self.final = final
         self.opkls = opkls
         self.fn_name = fn_name
-        self.e = Decode2ToExecute1Type(name=self.fn_name, opkls=self.opkls)
-        col_subset = self.get_col_subset(self.e.do)
+        if opkls is None:
+            opkls = Decode2ToOperand
+        self.do = opkls(fn_name)
+        col_subset = self.get_col_subset(self.do)
+
+        # only needed for "main" PowerDecode2
+        if not self.final:
+            self.e = Decode2ToExecute1Type(name=self.fn_name, do=self.do)
 
         # create decoder if one not already given
         if dec is None:
@@ -658,14 +665,14 @@ class PowerDecodeSubset(Elaboratable):
 
     def needs_field(self, field, op_field):
         if self.final:
-            do = self.e.do
+            do = self.do
         else:
             do = self.e_tmp.do
         return hasattr(do, field) and self.op_get(op_field) is not None
 
     def do_copy(self, field, val, final=False):
         if final or self.final:
-            do = self.e.do
+            do = self.do
         else:
             do = self.e_tmp.do
         if hasattr(do, field) and val is not None:
@@ -679,20 +686,17 @@ class PowerDecodeSubset(Elaboratable):
         m = Module()
         comb = m.d.comb
         state = self.state
-        e_out, op, do_out = self.e, self.dec.op, self.e.do
+        op, do = self.dec.op, self.do
         msr, cia = state.msr, state.pc
 
         # fill in for a normal instruction (not an exception)
         # copy over if non-exception, non-privileged etc. is detected
-        if self.final:
-            e = self.e
-        else:
+        if not self.final:
             if self.fn_name is None:
                 name = "tmp"
             else:
                 name = self.fn_name + "tmp"
-            self.e_tmp = e = Decode2ToExecute1Type(name=name, opkls=self.opkls)
-        do = e.do
+            self.e_tmp = Decode2ToExecute1Type(name=name, opkls=self.opkls)
 
         # set up submodule decoders
         m.submodules.dec = self.dec
@@ -721,7 +725,25 @@ class PowerDecodeSubset(Elaboratable):
         # set up instruction, pick fn unit
         # no op: defaults to OP_ILLEGAL
         comb += self.do_copy("insn_type", self.op_get("internal_op"))
-        comb += self.do_copy("fn_unit", self.op_get("function_unit"))
+
+        #function unit for decoded instruction
+        fn = self.op_get("function_unit")
+        spr = Signal(10, reset_less=True)
+        comb += spr.eq(decode_spr_num(self.dec.SPR)) # from XFX
+
+        # for first test only forward SPR 18 to mmu
+        with m.If(self.dec.op.internal_op == MicrOp.OP_MTSPR):
+            with m.If((spr == 18) | (spr == 19)):
+                comb += self.do_copy("fn_unit",Function.MMU)
+            with m.Else():
+                comb += self.do_copy("fn_unit",fn)
+        with m.If(self.dec.op.internal_op == MicrOp.OP_MFSPR):
+            with m.If((spr == 18) | (spr == 19)):
+                comb += self.do_copy("fn_unit",Function.MMU)
+            with m.Else():
+                comb += self.do_copy("fn_unit",fn)
+        with m.Else():
+            comb += self.do_copy("fn_unit",fn)
 
         # immediates
         if self.needs_field("zero_a", "in1_sel"):
@@ -911,22 +933,18 @@ class PowerDecode2(PowerDecodeSubset):
         # after a failed LD/ST.
         with m.If(exc.happened):
             with m.If(exc.alignment):
-                self.trap(m, TT.MEMEXC, 0x600)
+                self.trap(m, TT.PRIV, 0x600)
             with m.Elif(exc.instr_fault):
                 with m.If(exc.segment_fault):
-                    self.trap(m, TT.MEMEXC, 0x480)
+                    self.trap(m, TT.PRIV, 0x480)
                 with m.Else():
-                    # TODO
-                    #srr1(63 - 33) <= exc.invalid;
-                    #srr1(63 - 35) <= exc.perm_error; -- noexec fault
-                    #srr1(63 - 44) <= exc.badtree;
-                    #srr1(63 - 45) <= exc.rc_error;
-                    self.trap(m, TT.MEMEXC, 0x400)
+                    # pass exception info to trap to create SRR1
+                    self.trap(m, TT.MEMEXC, 0x400, exc)
             with m.Else():
                 with m.If(exc.segment_fault):
-                    self.trap(m, TT.MEMEXC, 0x380)
+                    self.trap(m, TT.PRIV, 0x380)
                 with m.Else():
-                    self.trap(m, TT.MEMEXC, 0x300)
+                    self.trap(m, TT.PRIV, 0x300)
 
         # decrement counter (v3.0B p1099): TODO 32-bit version (MSR.LPCR)
         with m.Elif(dec_irq_ok):
@@ -981,7 +999,7 @@ class PowerDecode2(PowerDecodeSubset):
 
         return m
 
-    def trap(self, m, traptype, trapaddr):
+    def trap(self, m, traptype, trapaddr, exc=None):
         """trap: this basically "rewrites" the decoded instruction as a trap
         """
         comb = m.d.comb
@@ -994,6 +1012,7 @@ class PowerDecode2(PowerDecodeSubset):
         comb += self.do_copy("fn_unit", Function.TRAP, True)
         comb += self.do_copy("trapaddr", trapaddr >> 4, True) # bottom 4 bits
         comb += self.do_copy("traptype", traptype, True)  # request type
+        comb += self.do_copy("ldst_exc", exc, True)  # request type
         comb += self.do_copy("msr", self.state.msr, True) # copy of MSR "state"
         comb += self.do_copy("cia", self.state.pc, True)  # copy of PC "state"