comb += spr.eq(decode_spr_num(self.dec.SPR)) # from XFX
# for first test only forward SPRs 18 and 19 to MMU, when
- # operation is MTSPR or MFSPR. TODO: use SPR.xxxx not 18/19.
+ # operation is MTSPR or MFSPR. TODO: add other MMU SPRs
with m.If(((self.dec.op.internal_op == MicrOp.OP_MTSPR) |
(self.dec.op.internal_op == MicrOp.OP_MFSPR)) &
- ((spr == 18) | (spr == 19))):
+ ((spr == SPR.DSISR) | (spr == SPR.DAR))):
comb += self.do_copy("fn_unit", Function.MMU)
with m.Else():
comb += self.do_copy("fn_unit",fn)
comb += dec_o2.lk.eq(do.lk)
# registers a, b, c and out and out2 (LD/ST EA)
- comb += e.read_reg1.eq(dec_a.reg_out)
- comb += e.read_reg2.eq(dec_b.reg_out)
- comb += e.read_reg3.eq(dec_c.reg_out)
- comb += e.write_reg.eq(dec_o.reg_out)
- comb += e.write_ea.eq(dec_o2.reg_out)
+ for to_reg, fromreg in (
+ (e.read_reg1, dec_a.reg_out),
+ (e.read_reg2, dec_b.reg_out),
+ (e.read_reg3, dec_c.reg_out),
+ (e.write_reg, dec_o.reg_out),
+ (e.write_ea, dec_o2.reg_out)):
+ comb += to_reg.data.eq(fromreg.data)
+ comb += to_reg.ok.eq(fromreg.ok)
# SPRs out
comb += e.read_spr1.eq(dec_a.spr_out)