from soc.decoder.pseudo.parser import GardenSnakeCompiler
from soc.decoder.selectable_int import SelectableInt, selectconcat
+from soc.decoder.isa.caller import GPR, Mem
+
####### Test code #######
#x <- x[0][32:63]
"""
+testdo = r"""
+do i = 0 to 7
+ print(i)
+"""
+
+testcond = """
+ctr_ok <- BO[2] | ((CTR[M:63] != 0) ^ BO[3])
+cond_ok <- BO[0] | ¬(CR[BI+32] ^ BO[1])
+"""
+
+lswx = """
+if RA = 0 then EA <- 0
+else EA <- (RA)
+if NB = 0 then n <- 32
+else n <- NB
+r <- RT - 1
+i <- 32
+do while n > 0
+ if i = 32 then
+ r <- (r + 1) % 32
+ GPR(r) <- 0
+ GPR(r)[i:i+7] <- MEM(EA, 1)
+ i <- i + 8
+ if i = 64 then i <- 32
+ EA <- EA + 1
+ n <- n - 1
+"""
+
+_lswx = """
+GPR(r)[x] <- 1
+"""
+
+switchtest = """
+switch (n)
+ case(1): x <- 5
+ case(2): fallthrough
+ case(3):
+ x <- 3
+ case(4): fallthrough
+ default:
+ x <- 9
+"""
+
+hextest = """
+RT <- 0x0001_a000_0000_0000
+"""
+
+code = hextest
+#code = lswx
+#code = testcond
+#code = testdo
+#code = _bpermd
#code = testmul
#code = testgetzero
#code = testcat
#code = testgpr
#code = testmem
-code = testgprslice
+#code = testgprslice
#code = testreg
#code = cnttzd
#code = cmpi
def get_reg_hex(reg):
return hex(reg.value)
-class Mem:
- def __init__(self):
- self.mem = []
- for i in range(128):
- self.mem.append(i)
+def convert_to_python(pcode, form, incl_carry):
- def __call__(self, addr, sz):
- res = []
- for s in range(sz): # TODO: big/little-end
- res.append(SelectableInt(self.mem[addr.value + s], 8))
- print ("memread", addr, sz, res)
- return selectconcat(*res)
-
- def memassign(self, addr, sz, val):
- print ("memassign", addr, sz, val)
- for s in range(sz):
- byte = (val.value) >> (s*8) & 0xff # TODO: big/little-end
- self.mem[addr.value + s] = byte
-
-
-class GPR(dict):
- def __init__(self, sd, regfile):
- dict.__init__(self)
- self.sd = sd
- for i in range(32):
- self[i] = SelectableInt(regfile[i], 64)
-
- def __call__(self, ridx):
- return self[ridx]
-
- def set_form(self, form):
- self.form = form
-
- def getz(self, rnum):
- #rnum = rnum.value # only SelectableInt allowed
- print("GPR getzero", rnum)
- if rnum == 0:
- return SelectableInt(0, 64)
- return self[rnum]
-
- def _get_regnum(self, attr):
- getform = self.sd.sigforms[self.form]
- rnum = getattr(getform, attr)
- return rnum
-
- def ___getitem__(self, attr):
- print("GPR getitem", attr)
- rnum = self._get_regnum(attr)
- return self.regfile[rnum]
-
-
-def convert_to_python(pcode):
-
- gsc = GardenSnakeCompiler()
+ print("form", form)
+ gsc = GardenSnakeCompiler(form=form, incl_carry=incl_carry)
tree = gsc.compile(pcode, mode="exec", filename="string")
tree = ast.fix_missing_locations(tree)
regsused = {'read_regs': gsc.parser.read_regs,
'write_regs': gsc.parser.write_regs,
- 'uninit_regs': gsc.parser.uninit_regs}
+ 'uninit_regs': gsc.parser.uninit_regs,
+ 'special_regs': gsc.parser.special_regs,
+ 'op_fields': gsc.parser.op_fields}
return astor.to_source(tree), regsused
def test():
- gsc = GardenSnakeCompiler()
+ gsc = GardenSnakeCompiler(debug=True)
gsc.regfile = {}
for i in range(32):
print("args", args)
print("-->", " ".join(map(str, args)))
- from soc.decoder.helpers import (EXTS64, EXTZ64, ROTL64, ROTL32, MASK,)
+ from soc.decoder.helpers import (EXTS64, EXTZ64, ROTL64, ROTL32, MASK,
+ trunc_div, trunc_rem)
d = {}
d["print"] = print_
d["EXTS64"] = EXTS64
d["EXTZ64"] = EXTZ64
+ d["trunc_div"] = trunc_div
+ d["trunc_rem"] = trunc_rem
d["SelectableInt"] = SelectableInt
d["concat"] = selectconcat
d["GPR"] = gsc.gpr
# uninitialised regs, drop them into dict for function
for rname in gsc.parser.uninit_regs:
d[rname] = SelectableInt(0, 64) # uninitialised (to zero)
- print("uninitialised", rname, get_reg_hex(d[rname]))
+ print("uninitialised", rname, hex(d[rname].value))
# read regs, drop them into dict for function
for rname in gsc.parser.read_regs:
regidx = yield getattr(decode.sigforms['X'], rname)
- d[rname] = gsc.gpr[regidx] # contents of regfile
- d["_%s" % rname] = regidx # actual register value
- print("read reg", rname, regidx, get_reg_hex(d[rname]))
+ d[rname] = gsc.gpr[regidx] # contents of regfile
+ d["_%s" % rname] = regidx # actual register value
+ print("read reg", rname, regidx, hex(d[rname].value))
exec(compiled_code, d) # code gets executed here in dict "d"
print("Done")
traces=decode.ports()):
sim.run()
- for i in range(len(gsc.gpr)):
- print("regfile", i, get_reg_hex(gsc.gpr[i]))
+ gsc.gpr.dump()
for i in range(0, len(gsc.mem.mem), 16):
hexstr = []
for j in range(16):
hexstr.append("%02x" % gsc.mem.mem[i+j])
hexstr = ' '.join(hexstr)
- print ("mem %4x" % i, hexstr)
+ print("mem %4x" % i, hexstr)
+
if __name__ == '__main__':
test()
projects / soc.git / blobdiff