add SVP64 CR EXTRA field-extension, from 3-bit to 7-bit (plus isvec)

[soc.git] / src / soc / decoder / power_svp64.py

diff --git a/src/soc/decoder/power_svp64.py b/src/soc/decoder/power_svp64.py
index d2efd16ff215eb50ab0455018ba302707a8df7c9..5ef9c0c4185a6d9f9dca0925d1a2c2db75d3b817 100644 (file)
--- a/src/soc/decoder/power_svp64.py
+++ b/src/soc/decoder/power_svp64.py
@@ -152,3 +152,6 @@ if __name__ == '__main__':
     for entry in minor_19:
         if entry['comment'].startswith('cr'):
             print (entry)
+    minor_31 = isa.get_svp64_csv("minor_31.csv")
+    for entry in minor_31:
+        print (entry)