comment out dsisr and dar in mmu FSM for now

[soc.git] / src / soc / fu / mmu / fsm.py

diff --git a/src/soc/fu/mmu/fsm.py b/src/soc/fu/mmu/fsm.py
index 1fd0f6577d3312c6693d1aaeef1aa48bb8559e2e..f09fd987e311f80f72db005ddec4be26c7c437d9 100644 (file)
--- a/src/soc/fu/mmu/fsm.py
+++ b/src/soc/fu/mmu/fsm.py
@@ -93,7 +93,8 @@ class FSMMMUStage(ControlBase):
         spr1_i = i_data.spr1
 
         # these are set / got here *ON BEHALF* of LoadStore1
-        dsisr, dar = ldst.dsisr, ldst.dar
+        # XXX have to deal with this another way
+        # dsisr, dar = ldst.dsisr, ldst.dar
 
         # busy/done signals
         busy = Signal()