use default decoder, do not pass one in.

[soc.git] / src / soc / simple / issuer.py

diff --git a/src/soc/simple/issuer.py b/src/soc/simple/issuer.py
index f28b45817a2133706b438ee1dda40e6ee06dc6bc..465ade0e4c9abc2bd5326fa111bcfaebb298a767 100644 (file)
--- a/src/soc/simple/issuer.py
+++ b/src/soc/simple/issuer.py
@@ -222,12 +222,14 @@ class TestIssuerInternal(Elaboratable):
         self.core_rst = ResetSignal("coresync")
 
         # instruction decoder.  goes into Trap Record
-        pdecode = create_pdecode()
+        #pdecode = create_pdecode()
         self.cur_state = CoreState("cur") # current state (MSR/PC/SVSTATE)
-        self.pdecode2 = PowerDecode2(pdecode, state=self.cur_state,
+        self.pdecode2 = PowerDecode2(None, state=self.cur_state,
                                      opkls=IssuerDecode2ToOperand,
                                      svp64_en=self.svp64_en,
                                      regreduce_en=self.regreduce_en)
+        pdecode = self.pdecode2.dec
+
         if self.svp64_en:
             self.svp64 = SVP64PrefixDecoder() # for decoding SVP64 prefix