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add SVSTATE to TestCase infrastructure for use in TestIssuer
[soc.git]
/
src
/
soc
/
simple
/
test
/
test_issuer.py
diff --git
a/src/soc/simple/test/test_issuer.py
b/src/soc/simple/test/test_issuer.py
index 78662579eee2a079c92c23e00ed110a654460028..4cb3bc0b849e0683ab7e59271856edfe649418d9 100644
(file)
--- a/
src/soc/simple/test/test_issuer.py
+++ b/
src/soc/simple/test/test_issuer.py
@@
-214,7
+214,8
@@
class TestRunner(FHDLTestCase):
test.msr,
initial_insns=gen, respect_pc=True,
disassembly=insncode,
- bigendian=bigendian)
+ bigendian=bigendian,
+ initial_svstate=test.svstate)
pc = 0 # start address
counter = 0 # test to pause/start