added comment to teststate
[soc.git] / src / soc / simple / test / teststate.py
index 3a65c9dc7628f27c72963392c72470e003411777..d2f4b51ff74b865c0e758c34e49db1f92f094634 100644 (file)
@@ -12,6 +12,9 @@ from openpower.test.state import (State, state_add, state_factory,
 from soc.fu.compunits.test.test_compunit import get_l0_mem
 
 class HDLState(State):
+    """HDLState: Obtains registers and memory from an nmigen simulator
+    object by implementing State class methods.
+    """
     def __init__(self, core):
         super().__init__()
         self.core = core