rename InternalOp to MicrOp
[soc.git] / src / soc / simulator / test_sim.py
index d1e65f4fcdb017f2679dde9f4d6ba3da18035fa7..dae60ceaf0aad1c486e460d29d4f8b9377e7c242 100644 (file)
@@ -3,7 +3,7 @@ from nmigen.back.pysim import Simulator, Delay, Settle
 from nmigen.test.utils import FHDLTestCase
 import unittest
 from soc.decoder.power_decoder import (create_pdecode)
-from soc.decoder.power_enums import (Function, InternalOp,
+from soc.decoder.power_enums import (Function, MicrOp,
                                      In1Sel, In2Sel, In3Sel,
                                      OutSel, RC, LdstLen, CryIn,
                                      single_bit_flags, Form, SPR,