X-Git-Url: https://git.libre-soc.org/?p=soc.git;a=blobdiff_plain;f=src%2Fsoc%2Fdecoder%2Fisa%2Fcaller.py;h=c58ad24808a5b7c8d29f391ba485711c7b88badc;hp=38a439f087d2827280c1ea9ac3669047448f2d20;hb=6fff2d13f15a7507a7894668e1b117a13148cea6;hpb=a44ab92986f621d775b8f43e3a637d9bb562183f

diff --git a/src/soc/decoder/isa/caller.py b/src/soc/decoder/isa/caller.py
index 38a439f0..c58ad248 100644
--- a/src/soc/decoder/isa/caller.py
+++ b/src/soc/decoder/isa/caller.py
@@ -214,7 +214,6 @@ class PC:
 
 
 # Simple-V: see https://libre-soc.org/openpower/sv
-# also soc.sv.svstate SVSTATEREC
 class SVP64State:
     def __init__(self, init=0):
         self.spr = SelectableInt(init, 32)
@@ -614,7 +613,9 @@ class ISACaller:
         pfx = SVP64PrefixFields()
         pfx.insn.value = opcode
         major = pfx.major.asint(msb0=True) # MSB0 inversion
-        print ("prefix test: opcode:", major, bin(major))
+        print ("prefix test: opcode:", major, bin(major),
+                pfx.insn[7] == 0b1, pfx.insn[9] == 0b1,
+                bin(pfx.rm.asint(msb0=True)))
 
     def execute_one(self):
         """execute one instruction