X-Git-Url: https://git.libre-soc.org/?p=soc.git;a=blobdiff_plain;f=src%2Fsoc%2Ffu%2Fspr%2Ftest%2Ftest_pipe_caller.py;h=e20c55e0ff5a4d00b1b967be588b6d0070f6a8f5;hp=3ba1ac3dff97afa9ce637a599e5337f27363a174;hb=8a8656cda656db9cd5ed66537f03dda185b2b4f6;hpb=cd0fd6811a743e717d24ddb071b776142f7ec9d2

diff --git a/src/soc/fu/spr/test/test_pipe_caller.py b/src/soc/fu/spr/test/test_pipe_caller.py
index 3ba1ac3d..e20c55e0 100644
--- a/src/soc/fu/spr/test/test_pipe_caller.py
+++ b/src/soc/fu/spr/test/test_pipe_caller.py
@@ -210,6 +210,7 @@ class TestRunner(FHDLTestCase):
                     # ask the decoder to decode this binary data (endian'd)
                     yield pdecode2.dec.bigendian.eq(bigendian)  # little / big?
                     yield pdecode2.msr.eq(msr) # set MSR in pdecode2
+                    yield pdecode2.cia.eq(pc) # set PC in pdecode2
                     yield instruction.eq(ins)          # raw binary instr.
                     yield Settle()