add jtag interface to issuer_verilog
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 22 Sep 2020 12:01:00 +0000 (13:01 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 22 Sep 2020 12:01:00 +0000 (13:01 +0100)
commit2f5feeceae2f50db56ea8cc52c2d91e59fc97bec
tree692106b952766dc51bdedd698782ba82d2bd80cc
parent6991f59619cefd42260ace8133d1bd2eda3ea4ba
add jtag interface to issuer_verilog
src/soc/debug/dmi.py
src/soc/debug/dmi2jtag.py
src/soc/debug/jtag.py
src/soc/simple/issuer.py
src/soc/simple/issuer_verilog.py