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(parent: 01ba4f3) | patch
fix TestMemLoadStoreUnit, it required a FSM to monitor write
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 27 Jun 2020 16:50:07 +0000 (17:50 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 27 Jun 2020 16:50:07 +0000 (17:50 +0100)
commit403d25ad385cd2e8a1fb1a80f95969b7b10e2b7b
tree2ea2ac66e581153b019c3e0480c3bfbcdc115529tree
parent01ba4f3c0a738d97516355295efaa2f6813d39a3commit | diff
fix TestMemLoadStoreUnit, it required a FSM to monitor write
and also needed to honour the "busy_o" signal
src/soc/config/test/test_pi2ls.py diff | blob | history
src/soc/experiment/lsmem.py diff | blob | history