sort out reset signalling after tracking down Simulation() bug
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 18 Dec 2021 15:37:38 +0000 (15:37 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 18 Dec 2021 15:37:38 +0000 (15:37 +0000)
commit4c8d23f1f87ac9be28ee2dacfbde8bc87595e0ae
treed22fa569f64abc1dcb1b442ee7d70834b860e3d0
parentd3310bb8821607054fbca1bff9d996f3e56f3261
sort out reset signalling after tracking down Simulation() bug
src/soc/experiment/dcache.py
src/soc/simple/issuer.py
src/soc/simple/test/test_issuer_mmu_ifetch.py
src/soc/simple/test/test_runner.py