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(parent: 30285c2) | patch
when setting DSISR in LoadStore1 use correct load bit (from register)
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 22 Dec 2021 03:53:45 +0000 (03:53 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 22 Dec 2021 03:53:45 +0000 (03:53 +0000)
commit6a59f146dab21011087bc72acce68c24b65f6799
tree4ec94d4256c5b1ef78c01a4a02e4f6508dc4a787tree
parent30285c2bc5e47477a582eb2fac4c537b9ae94a16commit | diff
when setting DSISR in LoadStore1 use correct load bit (from register)
src/soc/fu/ldst/loadstore.py diff | blob | history