adjust PLL connections looking for coriolis2 issue
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 27 May 2021 17:21:16 +0000 (18:21 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 27 May 2021 17:21:16 +0000 (18:21 +0100)
commit87a8f13a30f3d5c56e7ad34314b5ff330d718252
tree480155bc78769e1cd016df74983b4da527dbafeb
parent3dcd6975123afc55c7f24f2d48a22719aedcfdc6
adjust PLL connections looking for coriolis2 issue
src/soc/clock/dummypll.py
src/soc/simple/issuer.py