connect wishbone bus to test memory
authorTobias Platen <tplaten@posteo.de>
Tue, 19 Jan 2021 17:21:50 +0000 (18:21 +0100)
committerTobias Platen <tplaten@posteo.de>
Tue, 19 Jan 2021 17:21:50 +0000 (18:21 +0100)
commitde395fa8e62338b0d91abb229a7df0a7913c07fe
tree5dde60a6160b05a786fd8aab56faf0737ad54150
parent4f1ce7c834c68d6fbe8bfb98677c308599ddc982
connect wishbone bus to test memory
src/soc/fu/mmu/fsm.py