convert shift_rot to subset decoder

diff --git a/src/soc/fu/shift_rot/test/test_pipe_caller.py b/src/soc/fu/shift_rot/test/test_pipe_caller.py
index 34d4736e7773129a7ff5e902c732e33cd8ad9a0d..f94feceaacae2a0743f3b10a685d8f6f91727583 100644 (file)
--- a/src/soc/fu/shift_rot/test/test_pipe_caller.py
+++ b/src/soc/fu/shift_rot/test/test_pipe_caller.py
@@ -290,9 +290,11 @@ class TestRunner(unittest.TestCase):
         comb = m.d.comb
         instruction = Signal(32)
 
         comb = m.d.comb
         instruction = Signal(32)
 

-        pdecode = create_pdecode()
+        fn_name = "SHIFT_ROT"
+        opkls = ShiftRotPipeSpec.opsubsetkls

 
 

-        m.submodules.pdecode2 = pdecode2 = PowerDecode2(pdecode)
+        m.submodules.pdecode2 = pdecode2 = PowerDecode2(None, opkls, fn_name)
+        pdecode = pdecode2.dec

 
         pspec = ShiftRotPipeSpec(id_wid=2)
         m.submodules.alu = alu = ShiftRotBasePipe(pspec)
 
         pspec = ShiftRotPipeSpec(id_wid=2)
         m.submodules.alu = alu = ShiftRotBasePipe(pspec)


@@ -321,7 +323,7 @@ class TestRunner(unittest.TestCase):
 
     def check_alu_outputs(self, alu, dec2, sim, code):
 
 
     def check_alu_outputs(self, alu, dec2, sim, code):
 

-        rc = yield dec2.e.do.rc.data
+        rc = yield dec2.e.do.rc.rc

         cridx_ok = yield dec2.e.write_cr.ok
         cridx = yield dec2.e.write_cr.data
 
         cridx_ok = yield dec2.e.write_cr.ok
         cridx = yield dec2.e.write_cr.data