ISACaller: add option mmu

diff --git a/src/soc/decoder/isa/caller.py b/src/soc/decoder/isa/caller.py
index bfa2eb03cda34f8931d7a2e7687237b86211e001..4ee49443baf5ba64152af61481596bd3b96b1340 100644 (file)
--- a/src/soc/decoder/isa/caller.py
+++ b/src/soc/decoder/isa/caller.py
@@ -723,7 +723,8 @@ class ISACaller:
                  initial_insns=None, respect_pc=False,
                  disassembly=None,
                  initial_pc=0,
                  initial_insns=None, respect_pc=False,
                  disassembly=None,
                  initial_pc=0,

-                 bigendian=False):
+                 bigendian=False,
+                 mmu=False):

 
         self.bigendian = bigendian
         self.halted = False
 
         self.bigendian = bigendian
         self.halted = False


@@ -763,6 +764,8 @@ class ISACaller:
         self.svstate = initial_svstate
         self.gpr = GPR(decoder2, self, self.svstate, regfile)
         self.mem = Mem(row_bytes=8, initial_mem=initial_mem)
         self.svstate = initial_svstate
         self.gpr = GPR(decoder2, self, self.svstate, regfile)
         self.mem = Mem(row_bytes=8, initial_mem=initial_mem)

+        if mmu:
+            self.mem = RADIX(self.mem,self)

         self.imem = Mem(row_bytes=4, initial_mem=initial_insns)
         self.pc = PC()
         self.spr = SPR(decoder2, initial_sprs)
         self.imem = Mem(row_bytes=4, initial_mem=initial_insns)
         self.pc = PC()
         self.spr = SPR(decoder2, initial_sprs)