use microwatt-specific PLRU due to bug in nmutil version

(needs investigating)

diff --git a/src/soc/experiment/dcache.py b/src/soc/experiment/dcache.py
index b9e467bbfcc7b515b0b310ef0fc374c58cf830f0..6d2d3cf2ae425a243722f4ce882fc1935a11807f 100644 (file)
--- a/src/soc/experiment/dcache.py
+++ b/src/soc/experiment/dcache.py
@@ -51,8 +51,8 @@ from soc.experiment.wb_types import (WB_ADDR_BITS, WB_DATA_BITS, WB_SEL_BITS,
                                 WBIOMasterOut, WBIOSlaveOut)
 
 from soc.experiment.cache_ram import CacheRam
-#from soc.experiment.plru import PLRU
-from nmutil.plru import PLRU, PLRUs
+from soc.experiment.plru import PLRU, PLRUs
+#from nmutil.plru import PLRU, PLRUs
 
 # for test
 from soc.bus.sram import SRAM