first test of down-converted load/store from 64 to 32 bit

diff --git a/src/soc/bus/test/test_minerva.py b/src/soc/bus/test/test_minerva.py
index d70655ffcf3e71312bc53f52bfcaa82328b65629..5d784b1f4ef188d6bd7b2c5098f5839cdcc00b17 100644 (file)
--- a/src/soc/bus/test/test_minerva.py
+++ b/src/soc/bus/test/test_minerva.py
@@ -12,7 +12,7 @@ class TestSRAMBareLoadStoreUnit(BareLoadStoreUnit):
                 isinstance(pspec.dmem_test_depth, int)):
             depth = pspec.dmem_test_depth
         else:
-            depth = 32
+            depth = 64
         print("TestSRAMBareLoadStoreUnit depth", depth)
 
         self.mem = Memory(width=self.data_wid, depth=depth)