still experimenting with ALU-CompUnit interaction

diff --git a/src/soc/experiment/compalu_multi.py b/src/soc/experiment/compalu_multi.py
index 3523e3fbdda88968630b1cccbad0a992b62b025e..a87fa4862d86c7d55bc48664a089c9f3530212a7 100644 (file)
--- a/src/soc/experiment/compalu_multi.py
+++ b/src/soc/experiment/compalu_multi.py
@@ -199,7 +199,7 @@ class MultiCompUnit(RegSpecALUAPI, Elaboratable):
 
         # read-done,wr-proceed latch
         m.d.comb += rok_l.s.eq(self.issue_i)  # set up when issue starts
-        m.d.comb += rok_l.r.eq(self.alu.p.ready_o) # off when ALU acknowledges
+        m.d.comb += rok_l.r.eq(self.alu.n.valid_o) # off when ALU acknowledges
 
         # wr-done, back-to-start latch
         m.d.comb += rst_l.s.eq(all_rd)     # set when read-phase is fully done
@@ -293,7 +293,7 @@ class MultiCompUnit(RegSpecALUAPI, Elaboratable):
         # ALU says "valid".
         m.submodules.alu_l = alu_l = SRLatch(False, name="alu")
         m.d.comb += self.alu.n.ready_i.eq(alu_l.qn)
-        m.d.sync += alu_l.r.eq(self.alu.n.valid_o) # valid for one extra
+        m.d.sync += alu_l.r.eq(self.alu.n.valid_o & alu_l.q)
         m.d.comb += alu_l.s.eq(all_rd_pulse)
 
         # output the data from the latch on go_write