- comb += exec_pc_ready_i.eq(1)
- with m.If(exec_pc_valid_o):
- # TODO: update SRCSTEP here (in new_svstate)
- # and set update_svstate to True *as long as*
- # PC / SVSTATE was not modified. that's an
- # exception (or setvl was called)
- # TODO: loop into INSN_EXECUTE if it's a vector instruction
- # and SRCSTEP != VL-1 and PowerDecoder.no_out_vec
- # is True
- # unless PC / SVSTATE was modified, in that case do
- # go back to INSN_FETCH.
- m.next = "INSN_FETCH"
+ # wait on "core stop" release, at instruction end
+ with m.If(~dbg.core_stop_o & ~core_rst):
+ comb += exec_pc_ready_i.eq(1)
+ with m.If(exec_pc_valid_o):
+ # TODO: update SRCSTEP here (in new_svstate)
+ # and set update_svstate to True *as long as*
+ # PC / SVSTATE was not modified. that's an
+ # exception (or setvl was called)
+ # TODO: loop into INSN_EXECUTE if it's a vector
+ # instruction and SRCSTEP != VL-1 and
+ # PowerDecoder.no_out_vec is True
+ # unless PC / SVSTATE was modified, in that
+ # case do go back to INSN_FETCH.
+ m.next = "INSN_FETCH"
+ with m.Else():
+ comb += core.core_stopped_i.eq(1)
+ comb += dbg.core_stopped_i.eq(1)