Add test for popcnt to test_caller.py

diff --git a/src/soc/decoder/isa/caller.py b/src/soc/decoder/isa/caller.py
index 671360ccfb8b44b08e012b5d6be30e5cefa0a630..b521108b1322da4cac4896bc00bdac39a7310fcc 100644 (file)
--- a/src/soc/decoder/isa/caller.py
+++ b/src/soc/decoder/isa/caller.py
@@ -302,6 +302,8 @@ class ISACaller:
         if info.write_regs:
             output_names = create_args(info.write_regs)
             for name, output in zip(output_names, results):
+                if isinstance(output, int):
+                    output = SelectableInt(output, 256)
                 if name in info.special_regs:
                     print('writing special %s' % name, output)
                     if name in special_sprs:

diff --git a/src/soc/decoder/isa/test_caller.py b/src/soc/decoder/isa/test_caller.py
index 10db874c344b29fef311b3d731c49fd0207f1f25..2c1353614b9299c02c949ac86e6a43dcc6ba0665 100644 (file)
--- a/src/soc/decoder/isa/test_caller.py
+++ b/src/soc/decoder/isa/test_caller.py
@@ -238,6 +238,22 @@ class DecoderTestCase(FHDLTestCase):
             sim = self.run_tst_program(program, initial_regs)
             self.assertEqual(sim.gpr(2), SelectableInt(0x100000001, 64))
 
+    def test_popcnt(self):
+        lst = ["popcntb 2, 1",
+               "popcntw 3, 1",
+               "popcntd 4, 1"
+        ]
+        initial_regs = [0] * 32
+        initial_regs[1] = 0xdeadbeefcafec0de
+        with Program(lst) as program:
+            sim = self.run_tst_program(program, initial_regs)
+            self.assertEqual(sim.gpr(2),
+                             SelectableInt(0x605060704070206, 64))
+            self.assertEqual(sim.gpr(3),
+                             SelectableInt(0x1800000013, 64))
+            self.assertEqual(sim.gpr(4),
+                             SelectableInt(0x2b, 64))
+
         
 
     def test_mtcrf(self):