more tidyup on use of CompOpSubsetBase

diff --git a/src/soc/fu/mul/mul_input_record.py b/src/soc/fu/mul/mul_input_record.py
index 8d85d91327fdc5f0468adb2a3ae185ce7c07e31d..b5334decae4768c63bae93c18672533bf6b3c9c2 100644 (file)
--- a/src/soc/fu/mul/mul_input_record.py
+++ b/src/soc/fu/mul/mul_input_record.py
@@ -1,9 +1,10 @@
-from nmigen.hdl.rec import Record, Layout
+from soc.fu.base_input_record import CompOpSubsetBase
+from nmigen.hdl.rec import Layout
 
 from soc.decoder.power_enums import MicrOp, Function, CryIn
 
 
-class CompMULOpSubset(Record):
+class CompMULOpSubset(CompOpSubsetBase):
     """CompMULOpSubset
 
     a copy of the relevant subset information from Decode2Execute1Type
@@ -25,30 +26,5 @@ class CompMULOpSubset(Record):
                   ('insn', 32),
                   )
 
-        Record.__init__(self, Layout(layout), name=name)
+        super().__init__(layout, name=name)
 
-        # grrr.  Record does not have kwargs
-        self.insn_type.reset_less = True
-        self.fn_unit.reset_less = True
-        self.zero_a.reset_less = True
-        self.invert_a.reset_less = True
-        self.invert_out.reset_less = True
-        self.is_32bit.reset_less = True
-        self.is_signed.reset_less = True
-
-    def eq_from_execute1(self, other):
-        """ use this to copy in from Decode2Execute1Type
-        """
-        res = []
-        for fname, sig in self.fields.items():
-            eqfrom = other.do.fields[fname]
-            res.append(sig.eq(eqfrom))
-        return res
-
-    def ports(self):
-        return [self.insn_type,
-                self.invert_a,
-                self.invert_out,
-                self.is_32bit,
-                self.is_signed,
-        ]

diff --git a/src/soc/fu/shift_rot/sr_input_record.py b/src/soc/fu/shift_rot/sr_input_record.py
index 6b0c7eb9f546ccdd2a93eb8cf574582f6efa7ec0..2eb052d3ef1d9e377bbf4282368ab154510e98ba 100644 (file)
--- a/src/soc/fu/shift_rot/sr_input_record.py
+++ b/src/soc/fu/shift_rot/sr_input_record.py
@@ -1,9 +1,10 @@
-from nmigen.hdl.rec import Record, Layout
+from soc.fu.base_input_record import CompOpSubsetBase
+from nmigen.hdl.rec import Layout
 
 from soc.decoder.power_enums import MicrOp, Function, CryIn
 
 
-class CompSROpSubset(Record):
+class CompSROpSubset(CompOpSubsetBase):
     """CompSROpSubset
 
     a copy of the relevant subset information from Decode2Execute1Type
@@ -26,33 +27,5 @@ class CompSROpSubset(Record):
                   ('insn', 32),
                   )
 
-        Record.__init__(self, Layout(layout), name=name)
+        super().__init__(layout, name=name)
 
-        # grrr.  Record does not have kwargs
-        self.insn_type.reset_less = True
-        self.fn_unit.reset_less = True
-        self.input_carry.reset_less = True
-        self.output_carry.reset_less = True
-        self.input_cr.reset_less = True
-        self.output_cr.reset_less = True
-        self.is_32bit.reset_less = True
-        self.is_signed.reset_less = True
-
-    def eq_from_execute1(self, other):
-        """ use this to copy in from Decode2Execute1Type
-        """
-        res = []
-        for fname, sig in self.fields.items():
-            eqfrom = other.do.fields[fname]
-            res.append(sig.eq(eqfrom))
-        return res
-
-    def ports(self):
-        return [self.insn_type,
-                self.input_carry,
-                self.output_carry,
-                self.input_cr,
-                self.output_cr,
-                self.is_32bit,
-                self.is_signed,
-        ]

diff --git a/src/soc/fu/spr/spr_input_record.py b/src/soc/fu/spr/spr_input_record.py
index 72402d3eed17d4df81674b60729be766be2ddcf0..a19d2ba3b431a9dadf8d69e9bc97adad080b4f3f 100644 (file)
--- a/src/soc/fu/spr/spr_input_record.py
+++ b/src/soc/fu/spr/spr_input_record.py
@@ -1,6 +1,6 @@
-
-from soc.decoder.power_enums import (MicrOp, Function)
 from soc.fu.base_input_record import CompOpSubsetBase
+from soc.decoder.power_enums import (MicrOp, Function)
+
 
 class CompSPROpSubset(CompOpSubsetBase):
     """CompSPROpSubset