comment out broken spr code

diff --git a/src/soc/decoder/isa/radixmmu.py b/src/soc/decoder/isa/radixmmu.py
index 93230d6a3b0c88221f9848ccb3568202b1f4171b..c208fa09db604eb76afdf1c928449136badb651c 100644 (file)
--- a/src/soc/decoder/isa/radixmmu.py
+++ b/src/soc/decoder/isa/radixmmu.py
@@ -169,10 +169,11 @@ class RADIX:
     def __init__(self, mem, caller):
         self.mem = mem
         self.caller = caller
-        self.dsisr = self.caller.spr["DSISR"]
-        self.dar   = self.caller.spr["DAR"]
-        self.pidr  = self.caller.spr["PIDR"]
-        self.prtbl = self.caller.spr["PRTBL"]
+        #TODO move to lookup
+        #self.dsisr = self.caller.spr["DSISR"]
+        #self.dar   = self.caller.spr["DAR"]
+        #self.pidr  = self.caller.spr["PIDR"]
+        #self.prtbl = self.caller.spr["PRTBL"]
 
         # cached page table stuff
         self.pgtbl0 = 0