increase register number sizes from 5 to 7
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 29 Jan 2021 23:00:46 +0000 (23:00 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 29 Jan 2021 23:00:46 +0000 (23:00 +0000)
src/soc/decoder/decode2execute1.py

index d718532670db6c0ecca731b7d1de4f9027d585da..75b66d3635c724ce91e13198ab9c447fb5e42e46 100644 (file)
@@ -92,11 +92,11 @@ class Decode2ToExecute1Type(RecordObject):
 
         if asmcode:
             self.asmcode = Signal(8, reset_less=True) # only for simulator
-        self.write_reg = Data(5, name="rego")
-        self.write_ea = Data(5, name="ea") # for LD/ST in update mode
-        self.read_reg1 = Data(5, name="reg1")
-        self.read_reg2 = Data(5, name="reg2")
-        self.read_reg3 = Data(5, name="reg3")
+        self.write_reg = Data(7, name="rego")
+        self.write_ea = Data(7, name="ea") # for LD/ST in update mode
+        self.read_reg1 = Data(7, name="reg1")
+        self.read_reg2 = Data(7, name="reg2")
+        self.read_reg3 = Data(7, name="reg3")
         self.write_spr = Data(SPR, name="spro")
         self.read_spr1 = Data(SPR, name="spr1")
         #self.read_spr2 = Data(SPR, name="spr2") # only one needed