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whoops Makefile error
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 30 Mar 2021 10:22:17 +0000 (11:22 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 30 Mar 2021 10:22:17 +0000 (11:22 +0100)
Makefile patch | blob | history

diff --git a/Makefile b/Makefile
index 90d9621938518dd4a0692aedb33624f2898c5985..25b6135237a37318dbe5e80290633ecdbe2d705c 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -38,7 +38,7 @@ testgpio_run_sim:
 ls180_verilog:
        python3 src/soc/simple/issuer_verilog.py \
                --debug=jtag --enable-core --enable-pll \
-               --enable-xics --enable-sram4x4kblock --disable-svp64
+               --enable-xics --enable-sram4x4kblock --disable-svp64 \
                        src/soc/litex/florent/libresoc/libresoc.v
 
 test: install