move valid signal out of Decode2ToExecute1Type and into PowerDecoder2

diff --git a/src/soc/decoder/decode2execute1.py b/src/soc/decoder/decode2execute1.py
index b0274e3a92b3c72fef812d3730c1bd8fad262f20..75e29e1ba9532463b47eaa302546aa19f4927ac6 100644 (file)
--- a/src/soc/decoder/decode2execute1.py
+++ b/src/soc/decoder/decode2execute1.py
@@ -29,7 +29,6 @@ class Decode2ToExecute1Type(RecordObject):
 
         RecordObject.__init__(self, name=name)
 
-        self.valid = Signal(reset_less=True)
         self.insn_type = Signal(InternalOp, reset_less=True)
         self.fn_unit = Signal(Function, reset_less=True)
         if asmcode:

diff --git a/src/soc/decoder/power_decoder2.py b/src/soc/decoder/power_decoder2.py
index 767ca50a94b44310fd892b0e06f5a0c71092b6ef..5fd010584d7c296b3ae85401e532ccd9e68a35ba 100644 (file)
--- a/src/soc/decoder/power_decoder2.py
+++ b/src/soc/decoder/power_decoder2.py
@@ -543,6 +543,7 @@ class PowerDecode2(Elaboratable):
 
         self.dec = dec
         self.e = Decode2ToExecute1Type()
+        self.valid = Signal()
 
     def ports(self):
         return self.dec.ports() + self.e.ports()

diff --git a/src/soc/simple/core.py b/src/soc/simple/core.py
index 8e4ff93fd281867f23ad46f2414d32b534f2098d..0421110722ed832bac2bef1341157b8684a708e8 100644 (file)
--- a/src/soc/simple/core.py
+++ b/src/soc/simple/core.py
@@ -70,7 +70,7 @@ class NonProductionCore(Elaboratable):
         self.pdecode2 = PowerDecode2(pdecode)   # instruction decoder
 
         # issue/valid/busy signalling
-        self.ivalid_i = self.pdecode2.e.valid   # instruction is valid
+        self.ivalid_i = self.pdecode2.valid   # instruction is valid
         self.issue_i = Signal(reset_less=True)
         self.busy_o = Signal(name="corebusy_o", reset_less=True)