halve the test memory size again
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 26 Jun 2020 16:20:20 +0000 (17:20 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 26 Jun 2020 16:20:20 +0000 (17:20 +0100)
src/soc/experiment/pimem.py

index bd3422f0a97c737e7a357037acab1607188b9e9d..4bb6aafdd94a2b50de15237cf9f3155d2a5a4b0e 100644 (file)
@@ -206,7 +206,7 @@ class TestMemoryPortInterface(Elaboratable):
 
     def __init__(self, regwid=64, addrwid=4):
         # hard-code memory addressing width to 6 bits
-        self.mem = TestMemory(regwid, 6, granularity=regwid//8,
+        self.mem = TestMemory(regwid, 5, granularity=regwid//8,
                               init=False)
         self.regwid = regwid
         self.addrwid = addrwid