fix up asserts (check correct pads/cores)

https://bugs.libre-soc.org/show_bug.cgi?id=511#c12

diff --git a/src/soc/debug/test/test_jtag_tap_srv.py b/src/soc/debug/test/test_jtag_tap_srv.py
index ff3d330c271ba38af873ea51f82024467988c2d5..cbc25463e00fa53dd2471ec1f7f6ccc330663456 100644 (file)
--- a/src/soc/debug/test/test_jtag_tap_srv.py
+++ b/src/soc/debug/test/test_jtag_tap_srv.py
@@ -75,27 +75,43 @@ def jtag_sim(dut, srv_dut):
     print ("bs scan", bin(bs))
     yield
 
     print ("bs scan", bin(bs))
     yield
 

-    print ("io0 pad.i", (yield srv_dut.ios[0].pad.i))
-    print ("io1 core.o", (yield srv_dut.ios[1].core.o))
-    print ("io2 core.o", (yield srv_dut.ios[2].core.o))
-    print ("io2 core.oe", (yield srv_dut.ios[2].core.oe))
+    print ("io0 pad.i", (yield srv_dut.ios[0].core.i))
+    print ("io1 core.o", (yield srv_dut.ios[1].pad.o))
+    print ("io2 core.o", (yield srv_dut.ios[2].pad.o))
+    print ("io2 core.oe", (yield srv_dut.ios[2].pad.oe))

     print ("io3 core.i", (yield srv_dut.ios[3].core.i))
     print ("io3 pad.o", (yield srv_dut.ios[3].pad.o))
     print ("io3 pad.oe", (yield srv_dut.ios[3].pad.oe))
 
     print ("io3 core.i", (yield srv_dut.ios[3].core.i))
     print ("io3 pad.o", (yield srv_dut.ios[3].pad.o))
     print ("io3 pad.oe", (yield srv_dut.ios[3].pad.oe))
 

+    assert (yield srv_dut.ios[0].core.i) == 1
+    assert (yield srv_dut.ios[1].pad.o) == 0
+    assert (yield srv_dut.ios[2].pad.o) == 1
+    assert (yield srv_dut.ios[2].pad.oe) == 1
+    assert (yield srv_dut.ios[3].core.i) == 0
+    assert (yield srv_dut.ios[3].pad.o) == 0
+    assert (yield srv_dut.ios[3].pad.oe) == 1
+

     # extest
     ir_actual = yield from jtag_set_ir(dut, BS_EXTEST)
     print ("ir extest", bin(ir_actual))
     yield
 
     # extest
     ir_actual = yield from jtag_set_ir(dut, BS_EXTEST)
     print ("ir extest", bin(ir_actual))
     yield
 

-    print ("io0 pad.i", (yield srv_dut.ios[0].pad.i))
-    print ("io1 core.o", (yield srv_dut.ios[1].core.o))
-    print ("io2 core.o", (yield srv_dut.ios[2].core.o))
-    print ("io2 core.oe", (yield srv_dut.ios[2].core.oe))
+    print ("io0 pad.i", (yield srv_dut.ios[0].core.i))
+    print ("io1 core.o", (yield srv_dut.ios[1].pad.o))
+    print ("io2 core.o", (yield srv_dut.ios[2].pad.o))
+    print ("io2 core.oe", (yield srv_dut.ios[2].pad.oe))

     print ("io3 core.i", (yield srv_dut.ios[3].core.i))
     print ("io3 pad.o", (yield srv_dut.ios[3].pad.o))
     print ("io3 pad.oe", (yield srv_dut.ios[3].pad.oe))
 
     print ("io3 core.i", (yield srv_dut.ios[3].core.i))
     print ("io3 pad.o", (yield srv_dut.ios[3].pad.o))
     print ("io3 pad.oe", (yield srv_dut.ios[3].pad.oe))
 

+    assert (yield srv_dut.ios[0].core.i) == 0
+    assert (yield srv_dut.ios[1].pad.o) == 1
+    assert (yield srv_dut.ios[2].pad.o) == 0
+    assert (yield srv_dut.ios[2].pad.oe) == 0
+    assert (yield srv_dut.ios[3].core.i) == 1
+    assert (yield srv_dut.ios[3].pad.o) == 1
+    assert (yield srv_dut.ios[3].pad.oe) == 0
+

     # set pins
     bs_actual = 0b1011001
     yield srv_dut.ios[0].pad.i.eq(0)
     # set pins
     bs_actual = 0b1011001
     yield srv_dut.ios[0].pad.i.eq(0)


@@ -111,14 +127,22 @@ def jtag_sim(dut, srv_dut):
     print ("bs scan", bin(bs))
     yield
 
     print ("bs scan", bin(bs))
     yield
 

-    print ("io0 pad.i", (yield srv_dut.ios[0].pad.i))
-    print ("io1 core.o", (yield srv_dut.ios[1].core.o))
-    print ("io2 core.o", (yield srv_dut.ios[2].core.o))
-    print ("io2 core.oe", (yield srv_dut.ios[2].core.oe))
+    print ("io0 pad.i", (yield srv_dut.ios[0].core.i))
+    print ("io1 core.o", (yield srv_dut.ios[1].pad.o))
+    print ("io2 core.o", (yield srv_dut.ios[2].pad.o))
+    print ("io2 core.oe", (yield srv_dut.ios[2].pad.oe))

     print ("io3 core.i", (yield srv_dut.ios[3].core.i))
     print ("io3 pad.o", (yield srv_dut.ios[3].pad.o))
     print ("io3 pad.oe", (yield srv_dut.ios[3].pad.oe))
 
     print ("io3 core.i", (yield srv_dut.ios[3].core.i))
     print ("io3 pad.o", (yield srv_dut.ios[3].pad.o))
     print ("io3 pad.oe", (yield srv_dut.ios[3].pad.oe))
 

+    assert (yield srv_dut.ios[0].core.i) == 1
+    assert (yield srv_dut.ios[1].pad.o) == 0
+    assert (yield srv_dut.ios[2].pad.o) == 1
+    assert (yield srv_dut.ios[2].pad.oe) == 1
+    assert (yield srv_dut.ios[3].core.i) == 0
+    assert (yield srv_dut.ios[3].pad.o) == 0
+    assert (yield srv_dut.ios[3].pad.oe) == 1
+

     # reset
     yield from jtag_set_reset(dut)
     print ("bs reset")
     # reset
     yield from jtag_set_reset(dut)
     print ("bs reset")


@@ -132,6 +156,14 @@ def jtag_sim(dut, srv_dut):
     print ("io3 pad.o", (yield srv_dut.ios[3].pad.o))
     print ("io3 pad.oe", (yield srv_dut.ios[3].pad.oe))
 
     print ("io3 pad.o", (yield srv_dut.ios[3].pad.o))
     print ("io3 pad.oe", (yield srv_dut.ios[3].pad.oe))
 

+    assert (yield srv_dut.ios[0].core.i) == 0
+    assert (yield srv_dut.ios[1].pad.o) == 1
+    assert (yield srv_dut.ios[2].pad.o) == 0
+    assert (yield srv_dut.ios[2].pad.oe) == 0
+    assert (yield srv_dut.ios[3].core.i) == 1
+    assert (yield srv_dut.ios[3].pad.o) == 1
+    assert (yield srv_dut.ios[3].pad.oe) == 0
+

     ####### JTAG to DMI ######
 
     # write DMI address
     ####### JTAG to DMI ######
 
     # write DMI address