self.specials does not exist, Instances must be added as submodules

diff --git a/src/soc/bus/tercel.py b/src/soc/bus/tercel.py
index a927ef25b7cbccdc0305b1e3d59c9ce1a602c24f..1e204b5a582516dabfd7a41b8544b2cc8bbef029 100644 (file)
--- a/src/soc/bus/tercel.py
+++ b/src/soc/bus/tercel.py
@@ -162,7 +162,7 @@ class Tercel(Elaboratable):
             comb += pins.cs.eq(~self.cs_n_out)
             # ECP5 needs special handling for the SPI clock, sigh.
             if self.lattice_ecp5_usrmclk:
-                self.specials += Instance("USRMCLK",
+                m.submodules += Instance("USRMCLK",
                     i_USRMCLKI  = self.spi_clk,
                     i_USRMCLKTS = 0
                 )