remove invalid setting of d_in.valid from self.mmureq

diff --git a/src/soc/fu/ldst/loadstore.py b/src/soc/fu/ldst/loadstore.py
index 14e0278878faeb3fd8c311d7a293f95566e0349c..a9dbaba365714eb9be7b9bd7a5ce25c8c5fec7ca 100644 (file)
--- a/src/soc/fu/ldst/loadstore.py
+++ b/src/soc/fu/ldst/loadstore.py
@@ -246,7 +246,6 @@ class LoadStore1(PortInterfaceBase):
         m.d.comb += d_in.byte_sel.eq(self.byte_sel)
         m.d.comb += d_in.addr.eq(self.addr)
         m.d.comb += d_in.nc.eq(self.nc)
-        m.d.comb += d_in.valid.eq(self.mmureq)
         m.d.comb += self.done.eq(d_out.valid)
         m.d.comb += self.load_data.eq(d_out.data)