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use SPR constants
author
Tobias Platen
<tplaten@posteo.de>
Wed, 27 Jan 2021 19:45:37 +0000
(20:45 +0100)
committer
Tobias Platen
<tplaten@posteo.de>
Wed, 27 Jan 2021 19:45:37 +0000
(20:45 +0100)
src/soc/decoder/power_decoder2.py
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diff --git
a/src/soc/decoder/power_decoder2.py
b/src/soc/decoder/power_decoder2.py
index 83d5cfeac46415f37d6905b79b0d08d77f821e3d..0f4c16a2190e98a14e93c744c53e1c3c53066e6d 100644
(file)
--- a/
src/soc/decoder/power_decoder2.py
+++ b/
src/soc/decoder/power_decoder2.py
@@
-735,10
+735,10
@@
class PowerDecodeSubset(Elaboratable):
comb += spr.eq(decode_spr_num(self.dec.SPR)) # from XFX
# for first test only forward SPRs 18 and 19 to MMU, when
comb += spr.eq(decode_spr_num(self.dec.SPR)) # from XFX
# for first test only forward SPRs 18 and 19 to MMU, when
- # operation is MTSPR or MFSPR. TODO:
use SPR.xxxx not 18/19.
+ # operation is MTSPR or MFSPR. TODO:
add other MMU SPRs
with m.If(((self.dec.op.internal_op == MicrOp.OP_MTSPR) |
(self.dec.op.internal_op == MicrOp.OP_MFSPR)) &
with m.If(((self.dec.op.internal_op == MicrOp.OP_MTSPR) |
(self.dec.op.internal_op == MicrOp.OP_MFSPR)) &
- ((spr ==
18) | (spr == 19
))):
+ ((spr ==
SPR.DSISR) | (spr == SPR.DAR
))):
comb += self.do_copy("fn_unit", Function.MMU)
with m.Else():
comb += self.do_copy("fn_unit",fn)
comb += self.do_copy("fn_unit", Function.MMU)
with m.Else():
comb += self.do_copy("fn_unit",fn)