use FU-FU matrix, seems to be working, still have to resolve dependencies

diff --git a/src/experiment/cscore.py b/src/experiment/cscore.py
index c6f52cb844b2d0f9d254abf6295f75f5caf78107..0a321b5f9713ad969f3b5a7980bcd9aecfed933d 100644 (file)
--- a/src/experiment/cscore.py
+++ b/src/experiment/cscore.py
@@ -117,6 +117,10 @@ class Scoreboard(Elaboratable):
         issueunit = IntFPIssueUnit(self.n_regs, n_int_fus, n_fp_fus)
         m.submodules.issueunit = issueunit
 
+        # FU-FU Dependency Matrices
+        intfudeps = FUFUDepMatrix(n_int_fus, n_int_fus)
+        m.submodules.intfudeps = intfudeps
+
         #---------
         # ok start wiring things together...
         # "now hear de word of de looord... dem bones dem bones dem dryy bones"
@@ -131,9 +135,9 @@ class Scoreboard(Elaboratable):
                      regdecode.src1_i.eq(self.int_src1_i),
                      regdecode.src2_i.eq(self.int_src2_i),
                      regdecode.enable_i.eq(1),
-                     self.issue_o.eq(issueunit.issue_o)
+                     self.issue_o.eq(issueunit.issue_o),
+                    issueunit.i.dest_i.eq(regdecode.dest_o),
                     ]
-        m.d.sync += issueunit.i.dest_i.eq(regdecode.dest_o),
         self.int_insn_i = issueunit.i.insn_i # enabled by instruction decode
 
         # connect global rd/wr pending vectors
@@ -166,21 +170,41 @@ class Scoreboard(Elaboratable):
         m.d.sync += if_l[1].go_rd_i.eq(intpick1.go_rd_o[1]) # subtract rd
         m.d.sync += if_l[1].go_wr_i.eq(intpick1.go_wr_o[1]) # subtract wr
 
+        # create read-pending FU-FU vectors
+        intfu_rd_pend_v = Signal(n_int_fus, reset_less = True)
+        intfu_wr_pend_v = Signal(n_int_fus, reset_less = True)
+        for i in range(n_int_fus):
+            m.d.comb += intfu_rd_pend_v[i].eq(if_l[i].int_rd_pend_o.bool())
+            m.d.comb += intfu_wr_pend_v[i].eq(if_l[i].int_wr_pend_o.bool())
+            #m.d.comb += intfu_rd_pend_v[i].eq(if_l[i].int_readable_o)
+            #m.d.comb += intfu_wr_pend_v[i].eq(if_l[i].int_writable_o)
+
         # Connect INT Fn Unit global wr/rd pending
         for fu in if_l:
-            m.d.comb += fu.g_int_wr_pend_i.eq(g_int_wr_pend_v.g_pend_o)
-            m.d.comb += fu.g_int_rd_pend_i.eq(g_int_rd_pend_v.g_pend_o)
-
-        # Connect Picker
+            m.d.comb += fu.g_int_wr_pend_i.eq(intfu_wr_pend_v)
+            m.d.comb += fu.g_int_rd_pend_i.eq(intfu_rd_pend_v)
+
+        # Connect FU-FU Matrix, NOTE: FN Units readable/writable considered
+        # to be unit "read-pending / write-pending"
+        m.d.comb += intfudeps.rd_pend_i.eq(intfu_rd_pend_v)
+        m.d.comb += intfudeps.wr_pend_i.eq(intfu_wr_pend_v)
+        m.d.sync += intfudeps.issue_i.eq(issueunit.i.fn_issue_o)
+        for i in range(n_int_fus):
+            m.d.comb += intfudeps.go_rd_i[i].eq(intpick1.go_rd_o[i])
+            m.d.comb += intfudeps.go_wr_i[i].eq(intpick1.go_wr_o[i])
+
+        # Connect Picker (note connection to FU-FU)
         #---------
+        readable_o = intfudeps.readable_o
+        writable_o = intfudeps.writable_o
         m.d.comb += intpick1.go_rd_i[0].eq(~if_l[0].go_rd_i)
         m.d.comb += intpick1.go_rd_i[1].eq(~if_l[1].go_rd_i)
         m.d.comb += intpick1.req_rel_i[0].eq(int_alus[0].req_rel_o)
         m.d.comb += intpick1.req_rel_i[1].eq(int_alus[1].req_rel_o)
-        m.d.comb += intpick1.readable_i[0].eq(if_l[0].int_readable_o) # add rd
-        m.d.comb += intpick1.writable_i[0].eq(if_l[0].int_writable_o) # add wr
-        m.d.comb += intpick1.readable_i[1].eq(if_l[1].int_readable_o) # sub rd
-        m.d.comb += intpick1.writable_i[1].eq(if_l[1].int_writable_o) # sub wr
+        m.d.sync += intpick1.readable_i[0].eq(readable_o[0]) # add rd
+        m.d.sync += intpick1.writable_i[0].eq(writable_o[0]) # add wr
+        m.d.sync += intpick1.readable_i[1].eq(readable_o[1]) # sub rd
+        m.d.sync += intpick1.writable_i[1].eq(writable_o[1]) # sub wr
 
         #---------
         # Connect Register File(s)
@@ -201,7 +225,7 @@ class Scoreboard(Elaboratable):
         for i, alu in enumerate(int_alus):
             m.d.sync += alu.go_rd_i.eq(intpick1.go_rd_o[i])
             m.d.sync += alu.go_wr_i.eq(intpick1.go_wr_o[i])
-            m.d.comb += alu.issue_i.eq(fn_issue_l[i])
+            m.d.sync += alu.issue_i.eq(fn_issue_l[i])
             #m.d.comb += fn_busy_l[i].eq(alu.busy_o)  # XXX ignore, use fnissue
             m.d.comb += alu.src1_i.eq(int_src1.data_o)
             m.d.comb += alu.src2_i.eq(int_src2.data_o)
@@ -360,6 +384,10 @@ def scoreboard_sim(dut, alusim):
                 break
             print ("busy",)
             yield from print_reg(dut, [3,4,5])
+        yield
+        yield
+        yield
+        yield
 
 
     yield

diff --git a/src/experiment/score6600.py b/src/experiment/score6600.py
index 591fb794e7f59bf565664c7d3d6fb22928f3fda6..765523e40d8c7de8dd3a6e8ec2250f588d0878c3 100644 (file)
--- a/src/experiment/score6600.py
+++ b/src/experiment/score6600.py
@@ -119,11 +119,11 @@ class FunctionUnits(Elaboratable):
         intregdeps = FURegDepMatrix(n_int_fus, self.n_regs)
         m.submodules.intregdeps = intregdeps
 
-        m.d.comb += self.g_int_rd_pend_o.eq(intregdeps.rd_pend_o)
-        m.d.comb += self.g_int_wr_pend_o.eq(intregdeps.wr_pend_o)
+        m.d.sync += self.g_int_rd_pend_o.eq(intregdeps.rd_pend_o)
+        m.d.sync += self.g_int_wr_pend_o.eq(intregdeps.wr_pend_o)
 
-        m.d.comb += intfudeps.rd_pend_i.eq(self.g_int_rd_pend_o)
-        m.d.comb += intfudeps.wr_pend_i.eq(self.g_int_wr_pend_o)
+        m.d.sync += intfudeps.rd_pend_i.eq(self.g_int_rd_pend_o)
+        m.d.sync += intfudeps.wr_pend_i.eq(self.g_int_wr_pend_o)
 
         m.d.sync += intfudeps.issue_i.eq(self.fn_issue_i)
         m.d.sync += intfudeps.go_rd_i.eq(self.go_rd_i)
@@ -248,12 +248,12 @@ class Scoreboard(Elaboratable):
         go_wr_o = intpick1.go_wr_o
         go_rd_i = intfus.go_rd_i
         go_wr_i = intfus.go_wr_i
-        m.d.comb += go_rd_i[0:2].eq(go_rd_o[0:2]) # add rd
-        m.d.comb += go_wr_i[0:2].eq(go_wr_o[0:2]) # add wr
+        m.d.sync += go_rd_i[0:2].eq(go_rd_o[0:2]) # add rd
+        m.d.sync += go_wr_i[0:2].eq(go_wr_o[0:2]) # add wr
 
         # Connect Picker
         #---------
-        m.d.sync += intpick1.go_rd_i[0:2].eq(~go_rd_i[0:2])
+        m.d.comb += intpick1.go_rd_i[0:2].eq(~go_rd_i[0:2])
         m.d.comb += intpick1.req_rel_i[0:2].eq(cu.req_rel_o[0:2])
         int_readable_o = intfus.readable_o
         int_writable_o = intfus.writable_o
@@ -264,7 +264,7 @@ class Scoreboard(Elaboratable):
         # Connect Register File(s)
         #---------
         print ("intregdeps wen len", len(intfus.dest_rsel_o))
-        m.d.sync += int_dest.wen.eq(intfus.dest_rsel_o)
+        m.d.comb += int_dest.wen.eq(intfus.dest_rsel_o)
         m.d.comb += int_src1.ren.eq(intfus.src1_rsel_o)
         m.d.comb += int_src2.ren.eq(intfus.src2_rsel_o)
 
@@ -387,7 +387,7 @@ def scoreboard_sim(dut, alusim):
     if True:
         instrs.append((7, 2, 6, 1))
         instrs.append((3, 7, 1, 1))
-        instrs.append((2, 2, 3, 1))
+        #instrs.append((2, 2, 3, 1))
 
     for i, (src1, src2, dest, op) in enumerate(instrs):
 

diff --git a/src/scoreboard/fn_unit.py b/src/scoreboard/fn_unit.py
index fc05a9af3c198583b46ae3dc546c516a91ae9f72..3edabbde16eb2c2dc41eb4b5f9e8a4d508835090 100644 (file)
--- a/src/scoreboard/fn_unit.py
+++ b/src/scoreboard/fn_unit.py
@@ -171,7 +171,7 @@ class FnUnit(Elaboratable):
         g_wr_v = Signal(self.reg_width, reset_less=True)
         g_wr = Signal(reset_less=True)
         wo = Signal(reset_less=True)
-        m.d.comb += g_wr_v.eq(g_pend_i & xx_pend_o & self.rd_pend_o)
+        m.d.comb += g_wr_v.eq(g_pend_i & xx_pend_o)
         m.d.comb += g_wr.eq(~g_wr_v.bool())
         m.d.comb += wo.eq(g_wr & rd_l.qn & self.req_rel_i & shadown)
         m.d.comb += writable_o.eq(wo)

diff --git a/src/scoreboard/fu_dep_cell.py b/src/scoreboard/fu_dep_cell.py
index dc5daf39c1ad4edaf5b12b5fa2fcbe441d4fd214..9f63160445e8837a0b8157277f0c7368f2486040 100644 (file)
--- a/src/scoreboard/fu_dep_cell.py
+++ b/src/scoreboard/fu_dep_cell.py
@@ -22,8 +22,8 @@ class FUDependenceCell(Elaboratable):
 
     def elaborate(self, platform):
         m = Module()
-        m.submodules.rd_l = rd_l = SRLatch() # clock-sync'd
-        m.submodules.wr_l = wr_l = SRLatch() # clock-sync'd
+        m.submodules.rd_l = rd_l = SRLatch(sync=False) # clock-sync'd
+        m.submodules.wr_l = wr_l = SRLatch(sync=False) # clock-sync'd
 
         # write latch: reset on go_wr HI, set on write waiting and issue
         m.d.comb += wr_l.s.eq(self.issue_i & self.wr_pend_i)

diff --git a/src/scoreboard/fu_picker_vec.py b/src/scoreboard/fu_picker_vec.py
index 7fe5d5a066c2accdde9844777d1712a53aa5de71..fd44c45ff5a95db3e1a66cb6a5903f47704d0b01 100644 (file)
--- a/src/scoreboard/fu_picker_vec.py
+++ b/src/scoreboard/fu_picker_vec.py
@@ -15,7 +15,7 @@ class FU_Pick_Vec(Elaboratable):
 
     def elaborate(self, platform):
         m = Module()
-        m.d.comb += self.readable_o.eq(~self.rd_pend_i.bool())
-        m.d.comb += self.writable_o.eq(~self.wr_pend_i.bool())
+        m.d.comb += self.readable_o.eq(self.rd_pend_i.bool())
+        m.d.comb += self.writable_o.eq(self.wr_pend_i.bool())
         return m
 

diff --git a/src/scoreboard/group_picker.py b/src/scoreboard/group_picker.py
index ffd2a7cf03607911a3d855221f34e205ce6a60c6..5a865640cb93f8bf400f32f963a594cb48042704 100644 (file)
--- a/src/scoreboard/group_picker.py
+++ b/src/scoreboard/group_picker.py
@@ -64,7 +64,7 @@ class GroupPicker(Elaboratable):
         m.d.comb += wpick.i.eq(self.writable_i & self.req_rel_i)
         m.d.comb += self.go_wr_o.eq(wpick.o)
 
-        m.d.comb += rpick.i.eq(self.readable_i & self.go_rd_i)
+        m.d.comb += rpick.i.eq(self.readable_i) #& self.go_rd_i)
         m.d.comb += self.go_rd_o.eq(rpick.o)
 
         return m