remove singleton pattern

diff --git a/src/soc/decoder/isa/test_caller_svp64.py b/src/soc/decoder/isa/test_caller_svp64.py
index 14a72d26fad360f24cefde656fce957dc18ec9f4..118886c18d36faa9ff4f18cc5a2216d573500f2b 100644 (file)
--- a/src/soc/decoder/isa/test_caller_svp64.py
+++ b/src/soc/decoder/isa/test_caller_svp64.py
@@ -171,8 +171,10 @@ class DecoderTestCase(FHDLTestCase):
             self.assertEqual(CR0, SelectableInt(2, 4))
             self.assertEqual(CR1, SelectableInt(4, 4))
 
-    def run_tst_program(self, prog, initial_regs=[0] * 32,
+    def run_tst_program(self, prog, initial_regs=None,
                               svstate=None):
+        if initial_regs is None:
+            initial_regs = [0] * 32
         simulator = run_tst(prog, initial_regs, svstate=svstate)
         simulator.gpr.dump()
         return simulator