continue to assert PC in FetchFSM if needed

diff --git a/src/soc/simple/issuer.py b/src/soc/simple/issuer.py
index 15642018b0e459836ae809e24ed1edc96a189af8..ffb7dc9710a21152e88f7d0c98113b4929b44933 100644 (file)
--- a/src/soc/simple/issuer.py
+++ b/src/soc/simple/issuer.py
@@ -750,6 +750,7 @@ class FetchFSM(ControlBase):
                     with m.If(self.imem.f_busy_o &
                               ~pdecode2.instr_fault):  # zzz...
                         # busy but not fetch failed: stay in wait-read
+                        comb += self.imem.a_pc_i.eq(pc)
                         comb += self.imem.a_i_valid.eq(1)
                         comb += self.imem.f_i_valid.eq(1)
                     with m.Else():