stop display of LDSTCompUnit debug info on every cycle

diff --git a/src/soc/experiment/compldst_multi.py b/src/soc/experiment/compldst_multi.py
index be2c9031759b7b70971aa7bce5e1dab5af1dfa34..bf35d23a9c3d9d6f80cd1f9d6f7409a9c129a131 100644 (file)
--- a/src/soc/experiment/compldst_multi.py
+++ b/src/soc/experiment/compldst_multi.py
@@ -542,7 +542,8 @@ class LDSTCompUnit(RegSpecAPI, Elaboratable):
         comb += pi.priv_mode.eq(~oper_r.msr[MSR.PR])
         comb += pi.virt_mode.eq(oper_r.msr[MSR.DR])
         comb += pi.mode_32bit.eq(~oper_r.msr[MSR.SF])
-        sync += Display("LDSTCompUnit: oper_r.msr %x pr=%x dr=%x sf=%x",
+        with m.If(self.issue_i): # display this only once
+            sync += Display("LDSTCompUnit: oper_r.msr %x pr=%x dr=%x sf=%x",
                                       oper_r.msr,
                                       oper_r.msr[MSR.PR],
                                       oper_r.msr[MSR.DR],